1. Technical Field
The present invention relates to semiconductor device fabrication and more particularly to metal replacement gate structures and fabrication methods which provide flexibility in material selection and properties of devices associated therewith.
2. Description of the Related Art
Replacement metal gate structures have gained increased interest in the semiconductor processing industry. Replacement metal gate structures are provided by a process in which a metal gate conductor is introduced once a semiconductor device is fully formed. While replacement metal gates permit some advantages, the replacement metal gate structures suffer from important restrictions with respect to what the device needs to withstand during its formation and what the maximum thermal budget is once the metal gate process is completed.
Typically, the process for metal gate tuning requires about 600 degrees Celsius. Once the metal gate structure is completed, the thermal budget does not permit much more than 400 degrees Celsius. Any material deposited or formed before the gate is replaced must withstand a relatively high temperature anneal (˜600 degrees Celsius). No material process that follows the metal gate anneal can have a high thermal budget (e.g., greater than 400 degrees Celsius).
In a standard process flow, in which the gate is formed before dopant implantation, the gate is designed to withstand the dopant activation anneal of about 100° C. In this case, post silicide engineering using incorporation of an impurity followed by annealing is possible since early gate processing necessitates high stability for the gate and allows additional thermal budget.
In a replacement gate process, however, the silicide can, in principle, be formed either before or after the final gate is formed. When the silicide is formed before the replacement of the gate, thermal budget and silicide engineering is allowed but the silicide needs to withstand the high temperature treatment associated with the replacement of the gate. The proximity to the device channel and end of range (EOR) defects lead to multiple defects that are very hard to work with and can cause major yield degradation.
If the silicidation is performed after the replacement gate process, additional thermal processing in the 600 C range is not possible since the gate would drastically deteriorate. When the silicide is performed after gate metal replacement, the thermal budget is not acceptable and the contact resistance cannot be engineered through implants and anneals.